Until recently, the cathode ray tube ("CRT") has been the primary device for displaying information. While having sufficient display characteristics with respect to color, brightness, contrast, and resolution, CRTs are relatively bulky and power hungry. In view of the advent of portable laptop computers, the demand has intensified for a display technology which is lightweight, compact, and power efficient.
One available technology provides flat panel displays, and more particularly, Liquid Crystal Display ("LCD") devices. LCDs are currently used for laptop computers. However, these LCD devices provide poor contrast in comparison to CRT technology. Further, LCDs offer only a limited angular display range. Moreover, color LCD devices consume power at rates incompatible with extended battery operation. In addition, a color LCD tends to be far more costly than an equivalent CRT.
In light of these shortcomings, there have been several developments recently in thin film, Field Emission Display ("FED") technology. In U.S. Pat. No. 5,210,472, commonly assigned with the present invention and incorporated herein by reference, a FED design is disclosed which utilizes a phosphor luminescent screen and a matrix-addressable array of pointed, thin-film, cold emission cathodes each powered by a current regulator. Here, the FED incorporates a column signal to activate a column switching driver and a row signal to activate a row switching driver. At the intersection of both an activated column and an activated row, a grid-to-emitter voltage differential exists sufficient to induce a field emission, thereby causing illumination of the associated phosphor in a pixel on the phosphorescent screen. By employing this design, the bus line associated with the current regulator has a low parasitic capacitance, thus being easier to control.
Extensive research has recently made the manufacture of an inexpensive, low power, high resolution, high contrast, full color FED a more feasible alternative to LCDs. However, in order to produce a high resolution FED, a greater number of pixels per unit area (measured, for example, in square inches) is required. Thus, resolution is inversely proportional to the number of field emitter tips per pixel. For example, while a lower resolution FED may comprise 1000 tips per pixel, a higher resolution FED will comprise 1, 2, 3 or 4 tips per pixel.
Several problems may arise where a number of field emitter tips relate to a single pixel. Referring to FIG. 1, an FED is illustrated having a four tip per pixel design. In this architecture, four emitter tips, 20, 20', 20" and 20'", are each coupled together at a common node 25. Emitter tips 20, 20', 20" and 20'" are additionally coupled through a grid 15 to form a pixel 10 on an FED 5. Further, a pixelator 30 is coupled between a drive resistor 35 and common node 25.
The problems associated with this architecture are best understood from a top view of a physical layout. Referring to FIG. 2, pixel 10 is illustrated comprising field emitter tips 20, 20', 20" and 20'". Further, each tip, 20, 20', 20" and 20'" is positioned within the grid 15, which is coupled to a power bus 45 by means of a via or link 40. Because tips 20, 20', 20" and 20'" are each coupled to common node 25, should one tip electrically short, the remaining tips and the pixel as a whole will be inoperative as well. As there is no present design enabling the removal of a malfunctioning pixel, the entire FED, depending on the specifications, may be unusable. As such, the yield of an FED utilizing pixels of this design may be substantially adversely affected.
In light of these limitations, presently there is a need for an FED architecture which provides a means for decoupling a nonfunctional field emitter tip or tips. Ideally, this structural design must not increase manufacturing and labor costs. Thus, a circuit design solution incorporated into current FED technology is preferred.